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单片机外文翻译--AT89S52单片机

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单片机外文翻译--AT89S52单片机

AT89S52 英文资料 及中文翻译 AT89S52 Features Compatible with MCS-51 Products 8K Bytes of In-System Programmable ISP Flash Memory – Endurance 10,000 Write/Erase Cycles 4.0V to 5.5V Operating Range Fully Static Operation 0 Hz to 33 MHz Three-level Program Memory Lock 256 x 8-bit Internal RAM 32 Programmable I/O Lines Three 16-bit Timer/Counters Eight Interrupt Sources Full Duplex UART Serial Channel Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Watchdog Timer Dual Data Pointer Power-off Flag Fast Programming Time Flexible ISP Programming Byte and Page Mode Green Pb/Halide-free Packaging Option 1. Description The AT89S52 is a low-power, high-perance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S52 provides the following standard features 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. 2. Pin Description 2.1 VCC Supply voltage. 2.2 GND Ground. 2.3 Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL s. When 1s are written to port 0 pins, the pins can be used as high-impedance s. Port 0 can also be configured to be the multipld low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification. 2.4 Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL s. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as s. As s, Port 1 pins that are externally being pulled low will source current IIL because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count P1.0/T2 and the timer/counter 2 trigger P1.1/T2EX, respectively, as shown in the follow-ing table. Port 1 also receives the low-order address bytes during Flash programming and verification. Port Pin Alternate Functions P1.0 T2 external count to Timer/Counter 2, clock-out P1.1 T2EX Timer/Counter 2 capture/reload trigger and direction control

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